Topic: The assembler - registers MMX - conditional branch instructions.
For the purpose of acceleration of integer 64-bit arithmetics decided to try to use an assembly insertion with usage of registers MMX (which 64-bit and as well as possible would approach for my task).
I do not know how to make a cycle with the counter or the conditional passage on equality/inequality of contents of one of MMX-registers 0.
Some complexity that the counter (kol-in cycle repetitions) at me too 64-bit.
Whether probably it to make?
Instructions JZ, JNZ I so understand, for MMX-registers not at affairs?